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Conception microélectronique d’un discriminateur « zero-crossing » pour les détecteurs à haute résolution de temps 4D-Silicium (LGAD)

Laboratoire de Physique de Clermont UMR6533

StageSur site4 à 6 moisRémunéréDate limite : 25 oct. 2025
ElectroniqueMicroélectroniquePhysique des Particules

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Description

Job Description

Position: Microelectronics Design Intern

Project Overview

  • Ideal for a thesis project focusing on Research and Development in the field of particle physics, specifically related to experiments like those conducted at the Large Hadron Collider (LHC) at CERN.
  • Emphasis on improving temporal measurements in particle detectors alongside micrometer-level position measurements (4D detector) to enhance event reconstruction.
  • Targeting silicon pixel detectors of the LGAD type for rapid detection of minimally ionizing charged particles.

Responsibilities

  • Designing the microelectronic preamplification and signal shaping chain.
  • Evaluating a "zero-crossing" discriminator to reduce measurement error associated with signal amplitude variation (time walk).
  • Predicting temporal measurement dispersion (jitter) using the RMS noise-to-signal derivative ratio as a merit factor.
  • Utilizing Cadence software (Virtuoso and ADE) for integrated circuit design in TSMC 65 nm CMOS technology.
  • Exploring multiple architectures for configurable time constant signal shaping.
  • Optimizing and simulating the selected architecture at the schematic level and potentially post-layout (AC, stability, transient noise, corners, Monte-Carlo).

Qualifications

  • Background in microelectronics, semiconductor physics, or related field.
  • Familiarity with Cadence software tools.
  • Strong analytical skills for evaluating circuit performance.
  • Knowledge of CMOS technology and integrated circuit design principles.
  • Ability to work independently and collaboratively in a research-oriented environment.

Duration

  • Duration of the internship to be determined based on project requirements and candidate availability.

Location

  • The internship will be based at [Company/Institution Name] in [Location].

Application

  • Interested candidates should submit their resume and cover letter to [Contact Information] by [Application Deadline].